Echelon I/O Model Reference for Smart Transceivers and Neu Manual de usuario Pagina 133

  • Descarga
  • Añadir a mis manuales
  • Imprimir
  • Pagina
    / 209
  • Tabla de contenidos
  • MARCADORES
  • Valorado. / 5. Basado en revisión del cliente
Vista de pagina 132
I/O Model Reference 123
5
Timer/Counter Input Models
This chapter describes timer/counter input models.
Timer/counter I/O models use a timer/counter circuit in the
Neuron Chip or Smart Transceiver. Each Neuron Chip and
each Smart Transceiver has two timer/counter circuits: One
whose input can be multiplexed, and one with a dedicated
input.
Vista de pagina 132
1 2 ... 128 129 130 131 132 133 134 135 136 137 138 ... 208 209

Comentarios a estos manuales

Sin comentarios