Echelon I/O Model Reference for Smart Transceivers and Neu Manual de usuario Pagina 165

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I/O Model Reference 155
6
Timer/Counter Output Models
This chapter describes timer/counter output models.
Timer/counter I/O models use a timer/counter circuit in the
Neuron Chip or Smart Transceiver. Each Neuron Chip and
each Smart Transceiver has two timer/counter circuits: One
whose input can be multiplexed, and one with a dedicated
input.
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